Dádìsì Speaks

‘Faulty’ computer chip is 15x more efficient

In Science, Tech and Social Media on 25/05/2012 at 11:56

In terms of speed, energy consumption and size, inexact computer chips like this prototype, are about 15 times more efficient than today’s microchips. (Credit: Avinash Lingamneni/Rice University/CSEM)

RICE (US) —Researchers have created an “inexact” computer chip that’s super efficient, challenging the industry’s 50-year pursuit of accuracy.

The design improves power and resource efficiency by allowing for occasional errors. Scientists unveiled prototypes this week at the ACM International Conference on Computing Frontiers in Cagliari, Italy.

The research, which earned best-paper honors at the conference, was conducted by experts from Rice University, Singapore’s Nanyang Technological University (NTU), Switzerland’s Center for Electronics and Microtechnology (CSEM), and the University of California, Berkeley.

“It is exciting to see this technology in a working chip that we can measure and validate for the first time,” says project leader Krishna Palem, who also serves as director of the Rice-NTU Institute for Sustainable and Applied Infodynamics (ISAID). “Our work since 2003 showed that significant gains were possible, and I am delighted that these working chips have met and even exceeded our expectations.”

This comparison shows frames produced with video-processing software on traditional processing elements (left), inexact processing hardware with a relative error of 0.54 percent (middle) and with a relative error of 7.58 percent (right). The inexact chips are smaller, faster and consume less energy. The chip that produced the frame with the most errors (right) is about 15 times more efficient in terms of speed, space and energy than the chip that produced the pristine image (left). (Credit: Rice University/CSEM/NTU)

ISAID is working in partnership with CSEM to create new technology that will allow next-generation inexact microchips to use a fraction of the electricity of today’s microprocessors.

“The paper received the highest peer-review evaluation of all the Computing Frontiers submissions this year,” says Paolo Faraboschi, the program co-chair of the ACM Computing Frontiers conference and a distinguished technologist at Hewlett Packard Laboratories. “Research on approximate computation matches the forward-looking charter of Computing Frontiers well, and this work opens the door to interesting energy-efficiency opportunities of using inexact hardware together with traditional processing elements.”

The concept is deceptively simple: Slash power use by allowing processing components—like hardware for adding and multiplying numbers—to make a few mistakes. By cleverly managing the probability of errors and limiting which calculations produce errors, the designers have found they can simultaneously cut energy demands and dramatically boost performance. (cont … Futurity.org)

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